Memory system having flexible addressing and method using tag an

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules

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711218, G06F 1200

Patent

active

060789859

ABSTRACT:
A non-volatile memory system having a memory controller, an array of memory cells and a memory operation manager. The operation manager carries out memory program, read and erase operation upon receipt of program, read and erase instruction from the controller, typically over a system bus. The address block circuitry is provided in the manager which is capable of performing an memory operation on a single address or on multiple addresses depending upon the state of the address block circuitry as determined by the controller. Multiple addresses can be generated based upon a single address provided by the controller so that sectors of the memory can be programmed or read thereby simplifying memory operations and reducing the overhead of the memory controller.

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