Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-07-26
2009-02-10
Rinehart, Mark (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C711S169000
Reexamination Certificate
active
07490186
ABSTRACT:
A memory system having a memory controller and a daisy chain of memory chips. The memory controller is coupled to memory chips in the daisy chain of memory chips by an address/command bus chain. The memory controller is coupled to memory chips in the daisy chain of memory chips by a data bus chain having a number of data bus bits. The data bus chain has a first portion of data bus bits dedicated to transmitting write data from the memory controller to a memory chip. The data bus chain has a second portion of data bus bits dedicated to transmitting read data from a memory chip to the memory controller. Apportionment of data bus bits between the first portion and the second portion is programmable. Programming is done by pin connection, scanning of a value, or by request from a processor coupled to the memory controller.
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Bartley Gerald Keith
Becker Darryl John
Borkenhagen John Michael
Dahlen Paul Eric
Germann Philip Raymond
International Business Machines - Corporation
Rinehart Mark
Vu Trisha
Williams Robert R.
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