Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1981-08-03
1984-01-17
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Bad bit
G11C 1300
Patent
active
044266880
ABSTRACT:
A memory system having both a primary memory and an alternate memory. The alternate memory stores data to be substituted for data stored at memory locations in the primary memory that have defective cells. The alternate memory includes a byte memory and a bit memory. The byte memory stores bytes of data that are to replace bytes having multiple bit errors in the primary memory. The bit memory stores bits to replace single bits in any byte in the primary memory that has a single bit error. A mapping memory controls access to the primary memory and the alternate memory. The memory devices in the primary memory have either all row defects or all column defects in order to reduce the size of the mapping memory.
REFERENCES:
patent: 3350690 (1967-10-01), Rice
patent: 3434116 (1969-03-01), Anacker
Clark Robert L.
Jewett Stephen F.
Moffitt James W.
NCR Corporation
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