Memory system employing mostly good memories

Details Memory system employing mostly good memories Memory system employing mostly good memories

1981-01-02

1983-03-08

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Bad bit

371 10, G11C 1140

Patent

active

043763006

ABSTRACT:
A memory system is described which employs a plurality of "mostly good" memory chips. A redundant memory chip is used to store data designated to the defective locations in the mostly good memories. In one embodiment a PROM is programmed to recognize the addresses of the defective elements and to cause the redundant memory to be selected. In another embodiment, a content-addressable memory is employed to provide a new address in response to the addresses of defective elements in the mostly good memories.

REFERENCES:
patent: 3845476 (1974-10-01), Boehm
patent: 4047163 (1977-09-01), Choate et al.
patent: 4250570 (1981-02-01), Tsang et al.
patent: 4310901 (1982-01-01), Harding et al.

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