Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2002-12-13
2004-03-16
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S189090, C365S207000, C365S208000, C365S209000, C365S210130, C365S173000, C365S171000
Reexamination Certificate
active
06707737
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to memory systems suitable for performing burn-in test.
2. Description of the Background Art
Examples of memory systems manufactured using semiconductor techniques are DRAM (dynamic random access memory), FRAM (ferro-electric random access memory), MRAM (magnetic random access memory), etc.
Concretely, the MRAM is a memory system in which storage elements, being called TMR (tunneling magnet-resistance) elements, are used as memory elements in a memory array. The TMR element is a non-volatile memory element that has a magnetic material-insulator-magnetic material stacked structure. The magnetic materials are magnetized in a specific direction thereby to store multi-valued (e.g., binary) information.
More specifically, one of upper- and lower-layer magnetic materials in the TMR element is magnetized in a certain direction. Based on the contents of binary information to be stored for example (i.e., “0” or “1”), the other magnetic material is magnetized in a specific magnetization direction. The other magnetic material is magnetized by passing current through a digit line disposed in the vicinity of the other magnetic material from one direction to the other and vice versa. That is, this magnetization corresponds to the operation of writing information on the TMR element.
On the other hand, when a potential difference between the magnetic materials is caused to pass tunnel current throughout the stacked structure, a difference in the electric resistance of the TMR element is observed depending on the difference in the magnetization direction of the upper- and lower-layer magnetic materials. Therefore, the information can be read from the TMR element by detecting this electric resistance difference as a current signal or voltage signal.
Meanwhile, an insulating layer in the TMR element is formed so as to have an extremely small thickness that is for example equivalent to several atoms thin, in order to increase the value of tunnel current. For purpose of tunnel current generation, constant voltage is applied to the TMR element. It is preferably not too high since this would induce dielectric breakdown and damage to the TMR element.
As constant voltage usable in a memory system, there can be considered, for example, supply voltage Vcc that is applied from an external power source and used to drive the memory system. However, the value of supply voltage Vcc is usually susceptible to variations and therefore unsuitable as constant voltage applied to the TMR element. This is because a large variation would induce breakage of the TMR element.
Therefore, in the MRAM, there is usually generated reference voltage Vref having a predetermined value at which it is capable of withstanding over a predetermined range of variations in supply voltage Vcc, and this reference voltage Vref is applied to the TMR element. This reference voltage Vref is generated on a Vref voltage generator circuit disposed in the inside of the MRAM or the exterior thereof, based on supply voltage Vcc.
When performing burn-in test to a memory system, in general, the value of supply voltage Vcc is increased to expose to high temperature environment such that the deterioration of failure factor is accelerated. However, in the case that a reference voltage Vref as constant voltage is generated from supply voltage Vcc, like the MRAM, even when the value of supply voltage Vcc is increased in the burn-in test, the reference voltage Vref remaining the same as in the normal operation is merely applied to the TMR element, thereby failing to execute the burn-in test properly.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a memory system that generates reference voltage unaffected by variations in supply voltage and is suitable for performing burn-in test.
According to the present invention, a memory system includes a plurality of memory elements, voltage generator circuit, and switching means. The voltage generator circuit generates a reference voltage that is a voltage having a predetermined value used for reading information stored in the memory elements and that is unaffected by supply voltage variations over a predetermined range. The switching means is capable of switching between the state of applying the reference voltage to at least one of the memory elements and the state of applying, instead of the reference voltage, a reference voltage for burn-in test having a larger value than the reference voltage to the memory elements.
This memory system has the switching means that is capable of switching between the state of applying the reference voltage to memory elements and the state of applying, instead of the reference voltage, a reference voltage for burn-in test having a larger value than the reference voltage to the memory elements. Therefore, by operating the switching means, instead of the reference voltage for normal read operation, the reference voltage for burn-in test can be applied to a memory element at the time of burn-in test. That is, even with a memory system in which reference voltage is generated, it is possible to implement a memory system suitable for performing burn-in test.
REFERENCES:
patent: 6094395 (2000-07-01), Weinfurtner
patent: 6349063 (2002-02-01), Jibu
patent: 6501691 (2002-12-01), Kawamoto et al.
patent: 2003/0081453 (2003-05-01), Hidaka
patent: 2001-273799 (2001-10-01), None
Roy Scheuerlein et al., “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell”, ISSCC, Session 7, Feb. 2000, pp. 128-129.
Peter K. Naji et al., “A 256kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM”, ISSCC, Session 7, Feb. 2001, pp. 122-123.
Mitsubishi Denki & Kabushiki Kaisha
Tran Andrew Q.
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