Memory system and method having unidirectional data buses

Details Memory system and method having unidirectional data buses Memory system and method having unidirectional data buses

2007-04-03

2007-04-03

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S027000, C710S052000, C711S168000

Reexamination Certificate

active

10928411

ABSTRACT:
A memory system and method includes a unidirectional downstream bus coupling write data from a memory controller to several memory devices, and a unidirectional upstream bus coupling read data from the memory devices to the memory controller. The memory devices each include a write buffer for storing the write data until the respective memory device is no longer busy processing read memory requests. The downstream bus may also be used for coupling memory commands and/or row and column addresses from the memory controller to the memory devices.

REFERENCES:
patent: 4208715 (1980-06-01), Kumahara et al.
patent: 4503497 (1985-03-01), Krygowski et al.
patent: 4831522 (1989-05-01), Henderson et al.
patent: 4954992 (1990-09-01), Kumanoya et al.
patent: 5003485 (1991-03-01), Francisco
patent: 5202856 (1993-04-01), Glider et al.
patent: 5278957 (1994-01-01), Chan
patent: 5289431 (1994-02-01), Konishi
patent: 5369619 (1994-11-01), Ohba
patent: 5375089 (1994-12-01), Lo
patent: 5384745 (1995-01-01), Konishi et al.
patent: 5517462 (1996-05-01), Iwamoto et al.
patent: 5539691 (1996-07-01), Kozaru et al.
patent: 5597084 (1997-01-01), Parasin
patent: 5619471 (1997-04-01), Nunziata
patent: 5745732 (1998-04-01), Cherukuri et al.
patent: 5847998 (1998-12-01), Van Buskirk
patent: 5856947 (1999-01-01), Fang
patent: 5925118 (1999-07-01), Revilla et al.
patent: 5991223 (1999-11-01), Kozaru et al.
patent: 6038630 (2000-03-01), Foster et al.
patent: RE36655 (2000-04-01), Kozaru et al.
patent: 6061763 (2000-05-01), Rubin et al.
patent: 6081458 (2000-06-01), Lattimore et al.
patent: 6084823 (2000-07-01), Suzuki et al.
patent: 6091662 (2000-07-01), Mochida
patent: 6144604 (2000-11-01), Haller et al.
patent: 6167475 (2000-12-01), Carr
patent: 6195280 (2001-02-01), Lattimore et al.
patent: 6215497 (2001-04-01), Leung
patent: 6219763 (2001-04-01), Lentz et al.
patent: 6269413 (2001-07-01), Sherlock
patent: 6275432 (2001-08-01), Hardee
patent: 6278644 (2001-08-01), Takasugi
patent: 6282588 (2001-08-01), Yamamoto
patent: 6351423 (2002-02-01), Ooishi
patent: 6396749 (2002-05-01), Al-Shamma et al.
patent: 6442646 (2002-08-01), Tsuruta
patent: 6452864 (2002-09-01), Condemi et al.
patent: 6510161 (2003-01-01), Trevitt et al.
patent: 6515927 (2003-01-01), Trevitt et al.
patent: 6518787 (2003-02-01), Allegrucci et al.
patent: 6587905 (2003-07-01), Correale, Jr. et al.
patent: 6587927 (2003-07-01), Hotta et al.
patent: 6618775 (2003-09-01), Davis
patent: 6636444 (2003-10-01), Uchida et al.
patent: 6662285 (2003-12-01), Douglass et al.
patent: 6704238 (2004-03-01), Izutsu et al.
patent: 6717624 (2004-04-01), Kasai
patent: 6728157 (2004-04-01), Yagishita et al.
patent: 2002/0023191 (2002-02-01), Fudeyasu
How Memory Works, Kinston Technology.
Ram Guide, Tom's Haerware, Oct. 1998.
Meaning Behind Ram RAS and CAS, Hardware Hell.
Ace's Guide to Memory Technology, Ace's Hardware, Jul. 2000.
Dynamic Random Access Memory, Wikipedia.
Definition of memory controller from PC Guide.

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