Memory system and method for operating a memory system

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

Reexamination Certificate

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C711S105000, C711S157000

Reexamination Certificate

active

07966469

ABSTRACT:
A memory system, in particular a buffered memory system, e.g., a fully buffered memory system, a method for operating a memory system, and a device for use with a memory system is disclosed. The memory system may include a first buffered memory module, and a second buffered memory module, wherein the first and the second buffered memory modules are adapted to be accessed in parallel. According to a further embodiment of the invention, a device is provided which is adapted to map consecutive accesses to the first or the second memory module to a parallel access of both the first and the second memory module.

REFERENCES:
patent: 6356991 (2002-03-01), Bauman et al.
patent: 2001/0024389 (2001-09-01), Funaba et al.
patent: 2006/0179262 (2006-08-01), Brittain et al.
patent: 2006155220 (2006-06-01), None
“FB-DIMM Draft Specification: Architecture and Protocol”, Intel, May 3, 2004 (124 pgs).
WordNet, multiplex definition, available at http://wordnetweb.princeton.edu/perl/webwn?s=multiplex.

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