Memory system and method for controlling the same, and...

Details Memory system and method for controlling the same, and... Memory system and method for controlling the same, and...

2008-07-29

2008-07-29

Peugh, Brian R (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S146000

Reexamination Certificate

active

11276004

ABSTRACT:
A memory system including a bus10, 11, a memory17, a memory controller16, a first device13having a cache, and a second device15, all connected to the bus, wherein the memory controller includes a buffer20for temporarily storing cache data and write data that the second device writes in the memory. The buffer of the memory controller temporarily stores cached data and the write data to be written on write access to the memory by the second device, which enables maintenance of data coherency while avoiding a write access retry by the second device.

REFERENCES:
patent: 5355467 (1994-10-01), MacWilliams et al.
patent: 5617556 (1997-04-01), Baumgartner et al.
patent: 6216193 (2001-04-01), Lai et al.
patent: 6275885 (2001-08-01), Chin et al.
patent: 6732236 (2004-05-01), Favor
patent: 2007/0186051 (2007-08-01), Harada

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