Memory system and device with serialized data transfer

Details Memory system and device with serialized data transfer Memory system and device with serialized data transfer

2011-04-05

2011-04-05

Shin, Christopher B (Department: 2181)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S074000, C711S155000, C365S221000

Reexamination Certificate

active

07921245

ABSTRACT:
A memory system with serialized data transfer. The memory system includes within a memory controller and a plurality of memory devices. The memory controller receives a plurality of write data values from a host and outputs the write data values as respective serial streams of bits. Each of the memory devices receives at least one of the serial streams of bits from the memory controller and converts the serial stream of bits to a set of parallel bits for storage.

REFERENCES:
patent: 4369511 (1983-01-01), Kimura et al.
patent: 4775987 (1988-10-01), Miller
patent: 5091907 (1992-02-01), Wettengel
patent: 5216633 (1993-06-01), Weon
patent: 5473577 (1995-12-01), Miyake
patent: 5499385 (1996-03-01), Farmwald
patent: 5508967 (1996-04-01), Karino
patent: 5715407 (1998-02-01), Barth
patent: 5729711 (1998-03-01), Okamoto
patent: 5764963 (1998-06-01), Ware
patent: 5813043 (1998-09-01), Iles et al.
patent: 5854767 (1998-12-01), Nishi
patent: 5896545 (1999-04-01), Barth
patent: 6122189 (2000-09-01), Batra
patent: 6151239 (2000-11-01), Batra
patent: 6301182 (2001-10-01), Tanaka
patent: 6304930 (2001-10-01), Yamauchi
patent: 6401167 (2002-06-01), Barth
patent: 6762972 (2004-07-01), La
patent: 6801459 (2004-10-01), Riesenman et al.
patent: 6826663 (2004-11-01), Perego
patent: 6957307 (2005-10-01), Riesenman et al.
patent: 7143329 (2006-11-01), Trimberger et al.
patent: 7165177 (2007-01-01), Gilbert et al.
patent: 7171528 (2007-01-01), Evans
patent: 7216187 (2007-05-01), Perego et al.
patent: 7313639 (2007-12-01), Perego
patent: 2003/0159039 (2003-08-01), Gilbert
patent: 2003/0179605 (2003-09-01), Riesenman
patent: 2003/0182519 (2003-09-01), Riesenman
patent: 2004/0093471 (2004-05-01), Riesenman
patent: 2007/0073926 (2007-03-01), Perego et al.
patent: 0604309 (1994-06-01), None
patent: 03-122492 (1991-12-01), None
patent: 05-325545 (1993-10-01), None
patent: 07-121351 (1995-05-01), None
patent: WO 0215020 (2002-02-01), None
patent: WO 0215020 (2002-02-01), None
Response to Chinese Office Action filed Jan. 5, 2011, State Intellectual Property Office, Chinese Patent Application No. 200810098473.4 filed Jan. 13, 2004.
Response to Office Action dated Feb. 2, 2010, Chinese Patent Application No. 200810098473.4 filed Jan. 13, 2004.
Office Action dated Feb. 23, 2010, Japan Patent Office, Japanese Patent Application No. 2006-500933 filed Jan. 13, 2004.
Rambus Inc., “8/9-Mbit (1M×8/9) & 16/18Mbit (2M×8/9) RDRAM—Preliminary Information,” Rambus Inc. Data Sheet, Mar. 1, 1996, 30 pages.
European Search Report for UK Patent Application No. 0514229.4, Jul. 4, 2006.
Ware, Frederick A., “Direct RAC Data Sheet.” Advance Information. Document DL0064, Version 1.11. Copyright Jul. 2000, Rambus Inc. 66 pages.
“A Logical Overview of Direct Rambus Architecture,” Rambus, Inc., Mar. 1998, 150 pages.
Rambus Inc., “16/18Mbit (2M×8/9) & 64/72 Mbit (8M×8/9) Concurrent RDRAM—Advance Information,” Rambus Inc. Data Sheet, Jul. 1996, 61 pages.
Office Action dated Dec. 13, 2010, U.S. Appl. No. 12/116,439, filed May 7, 2008.
Chinese Office Action dated Nov. 8, 2010, State Intellectual Property Office, Chinese Patent Application No. 200810098473.4 filed Jan. 13, 2004.
Response to Japanese Office Action filed Aug. 23, 2010, Japan Patent Office, Japanese Patent Application No. 2006-500933, filed Jan. 13, 2004.
English Translation of Response to Japanese Office Action filed Aug. 23,2010, Japan Patent Office, Japanese Patent Application No. 2006-500933, filed Jan. 13, 2004.

Affiliated with

Also associated with

Rating

Memory system and device with serialized data transfer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory system and device with serialized data transfer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory system and device with serialized data transfer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2650192