Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Reexamination Certificate
2007-11-13
2007-11-13
Elmore, Stephen C. (Department: 2185)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
C711S105000, C711S154000, C711S167000, C711S170000, C365S233100
Reexamination Certificate
active
11071586
ABSTRACT:
Provided is a memory system and a method that can initialize a data channel at a high speed without the need to increase the number of pins in a semiconductor memory device, and not requiring a circuit to perform an initialization. The memory system includes a memory module equipped with a plurality of semiconductor memory devices; a memory controller controlling the semiconductor memory devices; and a data channel and a command/address channel connected between the plurality of semiconductor memory devices and the memory controller, wherein read latencies and write latencies of the plurality of semiconductor memory devices are controlled by the memory controller.
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patent: 2003/0026162 (2003-02-01), Matsui
Chung Hoe-ju
Lee Jung-bae
Elmore Stephen C.
Volentine & Whitt PLLC
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