Memory system and control method thereof

Details Memory system and control method thereof Memory system and control method thereof

2011-06-07

2011-06-07

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S723000, C365S201000, C711S103000

Reexamination Certificate

active

07958411

ABSTRACT:
A memory system includes a nonvolatile memory including blocks as data erase units, a measuring unit which measures an erase time at which data in each block is erased, a block controller having a block table which associates a state value indicating one of a free state and a used state with the erase time for each block, a detector which detects blocks in which rewrite has collectively occurred within a short period, a first selector which selects a free block having an old erase time as a first block, a second selector which selects a block in use having an old erase time as a second block, and a leveling unit which moves data in the second block to the first block if the first block is included in the blocks detected by the detector.

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Supplementary Search Report issued on Mar. 3, 2011, in counterpart European Patent Application No. 08810558 (8 pages).

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