Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
1999-09-28
2002-09-03
Ellis, Kevin L. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S103000
Reexamination Certificate
active
06446177
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a memory system using semiconductor memory to be used for the purpose of protecting copyrights. The invention also relates to a control method of electrically erasable and programmable nonvolatile semiconductor memory, especially useful for use to NAND EEPROM (electrically erasable and programmable read-only memory).
2. Description of the Prior Art
A flash memory card FMC as shown in
FIG. 1
has become of major interest lately as a recording medium of portable information devices such as digital still cameras, PDA (personal digital assistant), for example. The flash memory card FMC is a thin plastic package having formed a slight recess holding a built-in flash memory device FM with 22-pin planar electrodes. The flash memory card FMC can exchange data with a host system (personal computer) when electrically connected to the host system via a connector. For example, using a PC card adapter, any file on the flash memory card can be readily delivered to the personal computer.
However, since a memory system using the flash memory FM can easily copy any files including copyrighted ones, such as musical data, and infringement of copyrights has been an issue of this system.
Apart from this, electrically rewritable EEPROM is known as a sort of flash memory. Especially, NAND EEPROM using a NAND cell made by serially connecting a plurality of memory cells has attracted attention as being available for high integration. A memory transistor of NAND EEPROM, has a FETMOS structure in which a floating gate (charge storage layer) and a control gate are stacked on a semiconductor substrate via an insulating film. Then, a plurality of memory transistors are serially connected, with a source and a drain commonly used by every two adjacent memory transistors, to form a single-unit NAND cell, and the NAND cell is connected to a bit line. A number of such NAND cells in a matrix arrangement form a memory array.
A memory array of NAND EEPROM is made up of a plurality blocks. If a single NAND cell has 16 stages, then each block includes 16 word lines for selecting the NAND cells and memory cells within a range where these word lines are continuous. This one block is the minimum unit of collective erasure in flash memory configured to erase data collectively. Each range with memory transistors under one word line is normally called one page.
EEPROM flash memory is now being remarked as not only being rewritable like DRAM but also maintaining storage of data by its nonvolatility even after power supply is cut. In applications of EEPROM flash memory, there is the demand for limiting free rewriting in a part of its memory region and for designing it as OTP (one time PROM) permitting data writing only once.
The demand arises, for example, in devices having a flash memory system for intake and transfer of musical data, for example, which are subjects of the serious copyright problem, when duplication of musical data must be limited to a certain extent. More specifically, in a memory system using EEPROM flash memory, it is requested to store a mark data in an OTP region as an irreversible change of state of a chip every time when the EEPROM flash memory is accessed, accompanied by the task of rewriting data thereon, and to permit the irreversible change of state only predetermined times.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a memory system ensuring protection of copyrights when a flash memory card, for example, is used.
Another object of the invention is to provide a control method of nonvolatile semiconductor memory including an OTP in a part of its memory region, which is capable of writing a mark data reliably preventing erroneous writing, etc. in the OTP region and clearly maintaining the boundary between a written region and a non-written region, and hence reliably storing irreversible changes of state.
According to the invention, there is provided a memory system comprising:
a recording medium storing a data file and identifying information for restricting the condition for using the data file; and
a system apparatus permitting the recording medium to be removably set therein and requiring the identifying information when reading and using thereon the data file stored in the recording medium.
According to the invention, there is further provided a memory system comprising:
a recording medium storing a data file acquired by download from a distribution center together with identifying information incorporated into the data file for restricting the condition for using the data file; and
a system apparatus permitting the recording medium to be removably set therein and requiring the identifying information when reading and using thereon the data file stored in the recording medium.
According to the invention, there is further provided a recording medium which can be set in a system apparatus and can be removed from the system apparatus, comprising:
a data storage field for storing a data file; and
an identifying information storage field for storing identifying information for restricting the condition for using the data file, the identifying information required when the system apparatus reads and uses the data file.
According to the invention, there is further provided a system apparatus in which a recording medium is set and used, and the recording medium once set is removed, characterized in:
the recording medium storing a data file and identifying information for restricting the condition for using the data file; and
the system apparatus requiring the identifying information when reading and using the data file stored in the recording medium.
According to the invention, there is further provided a system apparatus in which a recording medium is set and used, and the recording medium once set is remove, characterized in:
an identifying information hold portion which holds identifying information for identifying the system apparatus; and
a judge portion which approves the use of the data file stored in the recording medium when a predetermined relation is established between identifying information incorporated into the data file stored in the recording medium and identifying information held in the identifying information hold portion, but does not approve the use of the data file when the predetermined relation is not established.
According to the invention, there is further provided a control method for controlling nonvolatile semiconductor memory having a memory cell array made of an arrangement of electrically rewritable nonvolatile memory cells, a part of the memory cell array forming a state change storage field permitting data to be written only once, said state change storage field including a plurality of pages each divided into a plurality of unit areas, comprising:
a first step for detecting that the nonvolatile semiconductor memory experienced a predetermined operation causing a change of state thereof; and
a second step for writing a mark data in one of the unit areas in the state change storage field when the predetermined change of state is detected.
According to the invention, there is further provided nonvolatile semiconductor memory having a memory cell array made up of an arrangement of electrically rewritable nonvolatile memory cells, comprising:
an ordinary field made up of a part of the memory cell array to store a data file; and
a state change storage field made up of another part of the memory cell array and including a plurality of pages each divided into a plurality of unit areas, the state change storage field permitting data to be rewritten only once, and upon any operation causing a predetermined change of state to the data file, a mark data is written in one of the unit areas.
REFERENCES:
patent: 5131091 (1992-07-01), Mizuta
patent: 5825875 (1998-10-01), Ugon
patent: 5838613 (1998-11-01), Takizawa
patent: 5887254 (1999-03-01), Halonen
patent: 5923486 (1999-07-01), Sugiyama et al.
patent: 5926624 (1999-07-01), Katz et al.
patent: 5944821 (1999-08-01
Kawamoto Kazuya
Nakabayashi Mikito
Nakamura Hiroshi
Sukegawa Hiroshi
Tanaka Yoshiyuki
Ellis Kevin L.
Hogan & Hartson LLP
Kabushiki Kaisha Toshiba
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