Memory system

Details Memory system Memory system

2011-07-19

2011-07-19

Peugh, Brian R (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

Reexamination Certificate

active

07984232

ABSTRACT:
A memory system includes a NAND flash memory including a memory block containing a plurality of pages, and a controller which controls write of data to the flash memory, and includes a scrambling circuit which converts the data into a pseudo random number, wherein the scrambling circuit includes an initial value generator which generates an initial value for every segment, an initial value shifter which shifts the initial value by N bits for every page address, a pseudo random number generator which generates a pseudo random number sequence by an M-sequence by using the initial value shifted N bits, and a random number adder which adds the pseudo random number sequence to the data.

REFERENCES:
patent: 2007/0136510 (2007-06-01), Ippongi
patent: 2008/0151618 (2008-06-01), Sharon et al.
patent: 2008/0205145 (2008-08-01), Kanno et al.
patent: 2008/0215798 (2008-09-01), Sharon et al.
patent: 11-339495 (1992-12-01), None
patent: WO 2008/099958 (2008-08-01), None
U.S. Appl. No. 12/844,308, filed Jul. 27, 2010, Niwa.

Affiliated with

Also associated with

Rating

Memory system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2635738