Memory structure for reduced floating body effect

Details Memory structure for reduced floating body effect Memory structure for reduced floating body effect

2007-04-03

2007-04-03

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S330000, C257S308000, C257S296000, C257SE27086, C257SE21648

Reexamination Certificate

active

11010752

ABSTRACT:
Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion region and the accompanying electrostatic potential created. In a preferred embodiment, a word line is recessed into the substrate to tie the upper active region to the substrate. The resulting memory cells are preferably used in dynamic random access memory (DRAM) devices.

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