Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2000-09-01
2002-10-01
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S230030, C714S036000, C714S042000
Reexamination Certificate
active
06459624
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a memory structure and, more particularly, a programmable memory structure erasable by electricity and a method for protecting the same, which can prevent the system from not being able to boot so that it is not necessary to restore the system afterward.
BACKGROUND OF THE INVENTION
Programmable memories erasable by electricity, such as electrically erasable programmable memories (EEPROM's) or flash memories, have been widely used in communication products or portable computers recently because they can keep data therein without the need of electricity. Also, they have the advantages of high data-accessing speed, small power dissipation, shock resistance, and better rewritable characteristic.
Moreover, because of continual development of system products, associated system standards become more and more complex. For information equipment, if the. basic input/output system (BIOS) of the system can not be refreshed immediately, the system can not acquire the advantages of the new BIOS. Therefore, programmable memories erasable by electricity are widely used to store the BIOS data of the system. Although EEPROM's or flash memories have the above advantages, the correct BIOS data therein may be altered improperly or damaged because they can be easily changed by electricity. This is more the case especially in nowadays when there are rampant computer viruses and hackers, resulting in the situations of not being able to boot or use the system. Therefore, inconvenience of the user will arise, and expense for restoring the system afterward will be wasted.
SUMMARY AND OBJECTS OF THE PRESENT INVENTION
Accordingly, the primary object of the present invention is to provide a memory structure capable of preventing the data therein from losing and a method for protecting the same. In the proposed memory structure, the memory is partitioned into a main memory section for storing data and a special memory section for storing a program registering a path (called a path program). The path program in the special memory section will be fully protected and controlled. When the data in the main memory section is damaged, the system will be directed to a path having another backup data so that booting procedures can be completed. Thereby the situation of not being able to boot will not occur.
Another object of the present invention is to provide a memory structure capable of preventing the data therein from losing and a method for protecting the same. In the proposed memory structure, the backup data can be duplicated directly into the main memory section to prevent the data from losing.
Yet another object of the present invention is to provide a memory structure capable of preventing the data therein from losing and a method for protecting the same, wherein the instruction for changing the data in the main memory section will be strictly monitored to prevent the attack of computer hackers or viruses.
Still yet another object of the present invention is to provide a memory structure capable of preventing the data therein from losing and a method for protecting the same, wherein the data in the main memory section will not be improperly changed so that remedial demarches and expense for restoration afterward can be avoided.
To accomplish the above objects, the present invention partitions a programmable memory erasable by electricity into a main memory section for storing data such as the BIOS and a special memory section for storing a path program. The special memory section can be connected to the main memory section and an error detector. A logical controller is respectively connected to the special memory section and a central processing unit (CPU) to control the change of the data in the special memory section. When the system is booted, the program in the special memory section will drive the error detector to detect whether the data or programs in the main memory section are damaged. If yes, the logical controller will directly read the backup data from a hard disk device via the CPU and duplicate the backup data directly into the main memory section. Thereby booting procedures can be successfully completed, preventing the data from losing.
The present invention also provides a method for fabricating a memory cell structure of a flash memory. The proposed fabrication method comprises mainly the following steps.
(1) The memory is partitioned into a main memory section for storing data and a special memory section for storing a path program. The special memory section is respectively connected to a logical controller and an error detector;
(2) When the program in the special memory section receives a reading instruction, it will drive the error detector to detect whether the data in the main memory section is correct;
(3) If the data in the main memory section is not correct, the program in the special memory section will drive the logical controller to read a backup data from a hard disk device and duplicate the backup data into the main memory section. Thereby booting procedures can be successfully completed, preventing the data from losing;
(4) When the program in the special memory section receives an alteration instruction, it will drive the logic controller to determine whether the alteration instruction is correct. Only if the alteration instruction is correct will the program in the special memory section inform the special memory to let an altered data be directly duplicated into the main memory section. Thereby attack of computer hackers and viruses can be prevented.
The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawings, in which:
REFERENCES:
patent: 5649090 (1997-07-01), Edwards et al.
patent: 6058047 (2000-05-01), Kikuchi
Dinh Son T.
Megawin Technology Co., Ltd.
Rosenberg , Klein & Lee
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