Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-03-22
2003-05-13
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000
Reexamination Certificate
active
06563161
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory-storage node, and more specifically to the storage node of dynamic random access memories (“DRAMs”).
2. Description of the Related Art
Dynamic random access memories (“DRAMs”) constitute one of the most important memory devices in various electronic circuits. The ongoing development and improvement in the technology of fabricating DRAMs has enabled the semiconductor industry to provide high density, low cost, and reliable memory devices with a broad scope of applications.
In general, a DRAM cell consists of a memory cell capacitor and a transfer gate transistor. In order to provide a large number of memory cells on a limited area of a semiconductor substrate, the memory cell capacitor and the transfer gate transistor must be densely packed without losing their operational characteristics and efficiency. One of the continuing goals of development in the fabrication technology of DRAMs is to reduce the area that a capacitor occupies while maintaining the same storage capacity by using dielectrics with high dielectric constants, such as BaSrTiO
3
(“BST”). The use of the high dielectric constant dielectrics, however, creates new challenges to the manufacturing process of DRAMs. The process of applying these dielectrics often cause problems such as the incompatibility between the materials of neighboring layers, and the impact on the characteristics of each layer caused by the high temperature processes of forming these dielectrics.
Taking BST as an example, one of the difficulties in the process integration of 2 BST capacitors occurs in the form of interface incompatibility. Most of the accompanying electrode materials used in modern technology, such as Pt, Ru, Ir, and conductive metal oxides, require a certain barrier layer at their interface with the underlying conductive plug. The conductive plug of metal or poly-crystalline silicon connects the capacitor with a cell transistor. Binary or ternary refractory metal nitrides, such as TiN, TiSiN, TiAlN, are used to protect the storage electrode from reacting with underlying silicon components of the conductive plug during several high temperature processes, including the BST film deposition, high temperature annealing, and insulating layer deposition. Binary or ternary refractory metal is also used to maintain the electrical conductivity of the barrier after all these processes have been performed.
The first major problem arises from the oxidization of the barrier layer and/or the underlying conductive plug of poly-crystalline silicon. A simple stack of barrier/electrode structure is prone to oxidation during the BST deposition because of the exposure of the side wall area to the atmosphere. When the barrier layer is buried in the contact plug, the side wall of the barrier is not exposed to the oxidizing atmosphere, the problem of contact oxidation is therefore reduced. The buried barrier scheme, however, might suffer from the oxidation problem if any displacement between the contact plug and electrode stack occurs. The modern process of high density and extremely small feature size, such as a relevant feature size of 0.13 &mgr;m and beyond, provides almost no tolerance against any misalignment between the contact hole and the electrode. As a result, the contact plug can be easily subject to oxidation for any minor misalignment.
FIGS. 1A-1F
illustrate the prior art structure of a recessed barrier scheme. As shown in
FIG. 1B
, a contact plug
8
is formed within an opening in an insulation layer
6
.
FIG. 1C
illustrates the formation of a SiN spacer
10
in the opening of the insulation layer
6
. A Pt-encapsulated Ru storage node
12
is formed on a barrier layer
9
, as shown in FIG.
1
E. FIG. IF illustrates that a Pt-spacer
14
is formed over the Ru storage node
12
and a BST layer
16
is formed over the Pt-spacer
14
. The structure design requires the formation of the spacer
10
in
FIG. 1C
to avoid the misalignment problem during the process of forming a capacitor cell, and to eliminate the oxidation of the underlying contact plug
8
. The addition of the spacer
10
, however, complicates the whole process of fabricating the capacitor cell and increases the production time and cost.
FIGS. 2A-2D
illustrate another type of BST capacitor integration in the prior art. The structure integrated a concave hole
26
on a buried-in, CVD-TiN plug
22
in FIG.
2
A and the deposition of TiSiN glue layer
28
and Pt node electrode
30
in FIG.
2
B. The structure also integrated the separation of a Pt node
30
a
from other Pt nodes in FIG.
2
C and the deposition of a BST thin film
32
and top electrode
34
in FIG.
2
D. Referring to
FIG. 2A
, the formation of the concave hole
26
in this structure requires a silicon-dioxide etching of the upper silicon-dioxide layer
24
instead of metal electrode etching to form the storage node concave hole
26
. Therefore, the process requires stringent etching-rate uniformity in order to ensure a wafer-wide uniformity for the formation of the concave hole
26
and the capacitance of capacitors, especially when the structure does not provide an etch-stop layer between the upper silicon-dioxide layer
24
and the underlying silicon-dioxide layer
20
.
Other kinds of electrode contacts of BST capacitors have been proposed to resolve the problems, including polysilicon/Ti/TiN/RuO
2
/BST/TiN/Al, polysilicon/Ru/BST/Ru, polysilicon/Ti/TiN/Pt/BST/plate-electrode, and metal plug/TiAlN/SrRuO
3
/BST/SrRuO
3
. Both Pt and Ru as electrode materials have adhesion problems with a silicon-dioxide film. A conductive perovskite-oxide, polycrystalline SrRuO
3
has been proposed to improve the adhesion. The direct contact between polysilicon and SrRuO
3
, however, have been reported to result in two intermediate layers of amorphous silicon dioxide and Sr—Ru—Si oxide that are formed between a polysilicon plug and a SrRuO
3
electrode. Therefore, this proposed structure and process need the insertion of a barrier layer between contact plug and SrRuO
3
electrode in order to avoid interface incompatibility and provide a stable contact structure.
FIGS. 3A-3D
illustrate the formation of a concave capacitor structure of metal plug/TiAlN/SrRuO
3
/BST/SrRuO
3
.
FIGS. 3C and 3D
illustrates the use of a metal plug
40
, a TiAlN barrier layer
42
, a first electrode
44
of SrRuO
3
, a dielectric film
46
of BST, and a second electrode
48
of SrRuO
3
.
The structure has its merits in several aspects. First, the BST crystallizing temperature is reduced by using SrRuO
3
electrodes
44
and
48
in
FIG. 3D
because SrRuO
3
has the same perovskite structure as a BST dielectric film
46
. Second, the structure has no interfacial, low-dielectric layer between the BST film
46
and the SrRuO
3
electrodes
44
and
48
, and thereby ensures the high dielectric constant of the BST capacitor. Third, the electrical characteristics of the BST capacitor is improved through lattice matching to reduce defects such as oxygen vacancies, and through smooth morphology at the interface between the BST film
46
and the SrRuO
3
electrodes
44
and
48
. Finally, this prior art approach improves the electrical conductivity of the contact plug by using metallic materials as the plug
40
. The approach also increases the tolerances of misalignment between the first electrode
44
and barrier
42
/contact plug
40
by using the concave storage node, and obtains a better wafer-wide uniformity of the capacitance of capacitors through the improved control of concave-etching depth by using an etch-stop layer.
The oxidation resistance for TiN or TiAlN, however, is one of the concerns while using those materials as the barrier layer
42
between the SrRuO
3
electrode
40
and the contact plug
40
of either metal or polysilicon in FIG.
3
D. Reports have shown that a TiAlN film has a better oxidation resistance than a TiN film. Aluminum of about 9% included in the TiN film is found to play an important role in increasing the oxidation resi
Chiang Ming-Chung
Chu Chung-Ming
Sheu Bor-ru
Yang Min-Chieh
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Flynn Nathan J.
Quinto Kevin
Winbond Electronics Corporation
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