Memory state recovering apparatus

Details Memory state recovering apparatus Memory state recovering apparatus

1999-05-25

2000-06-20

Beausoliel, Jr., Robert W.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

G06F 1100

Patent

active

06079030&

ABSTRACT:
In a memory state recovering apparatus, processors process data and a main memory holds data necessary for the data processing at the processors. Caches are provided to correspond to the processors and have the function of issuing an invalidation transaction to specify the invalidation of the data to maintain the consistency of the data. A before image buffer combines an address in the main memory with the data held in the location indicated by the address and stores the combination. A memory access control section stores in the buffer memory the address targeted in the main memory and the data stored in the location indicated by the address in accordance with the invalidation transaction issued from the caches. With this configuration, the time required for a checkpoint process can be shortened, thereby improving the system performance.

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