Memory repair system and method

Details Memory repair system and method Memory repair system and method

2011-05-24

2011-05-24

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000, C365S230060

Reexamination Certificate

active

07948818

ABSTRACT:
An integrated circuit (IC) comprises a memory module that stores at least one of data and code. A memory repair database stores data relating to defective memory addresses. A memory control module detects defective memory locations in the memory module, locates redundant memory elements in the memory module, and stores information that associates memory addresses of the defective memory locations with the redundant memory elements in the memory repair database. Storing said information includes electrically altering at least one of a plurality of electrical fuses. A redundant memory decoder module receives the information and physically remaps the memory addresses to the redundant memory locations.

REFERENCES:
patent: 4250570 (1981-02-01), Tsang et al.
patent: 6178126 (2001-01-01), Kirihata et al.
patent: 6449197 (2002-09-01), Hiraki et al.
patent: 6667917 (2003-12-01), Templeton et al.
patent: 6728148 (2004-04-01), Yamauchi
patent: 6940765 (2005-09-01), Kyung
patent: 7187602 (2007-03-01), Wohlfahrt et al.
patent: 7359261 (2008-04-01), Wu et al.
patent: 7751264 (2010-07-01), Wu et al.
Self-Repair Boosts Memory SoC Yields; Vincent Ratford; CommsDesign.com; Sep. 5, 2001; 6 pages.

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