Memory repair circuit and repairable pseudo-dual port static...

Details Memory repair circuit and repairable pseudo-dual port static... Memory repair circuit and repairable pseudo-dual port static...

2008-12-29

2010-10-05

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S230020, C365S230030, C365S230060

Reexamination Certificate

active

07808847

ABSTRACT:
The present invention relates to a memory repair circuit and a repairable pseudo-dual port static random access memory (pseudo-dual port SRAM). The memory repair circuit uses fewer redundant column blocks and stores a few failed block addresses to reduce the required complexity of decoding the redundant column blocks. Thus, the present invention can reduce a layout area required by redundant memory cells.

REFERENCES:
patent: 5257229 (1993-10-01), McClure et al.
patent: 7173867 (2007-02-01), Terzioglu
patent: 7590015 (2009-09-01), Kodaira et al.

Affiliated with

Also associated with

Rating

Memory repair circuit and repairable pseudo-dual port static... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory repair circuit and repairable pseudo-dual port static..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory repair circuit and repairable pseudo-dual port static... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4214475