Memory refresh method and apparatus

Details Memory refresh method and apparatus Memory refresh method and apparatus

2007-12-05

2009-06-23

Mai, Son L (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S227000, C711S106000

Reexamination Certificate

active

07551505

ABSTRACT:
An integrated circuit includes one or more memory array segments configured to store information and a refresh controller. Each memory array segment has a plurality of memory cells arranged in rows selectable through a row address. The refresh controller is configured to monitor row address activity to identify which bits of the row address change state at least once during a memory access operation and to skip refresh of the rows associated with the row address bits that do not change state at least once during the memory access operation.

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