Memory read/write reordering

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S151000, C711S154000, C711S138000, C710S039000, C710S040000

Reexamination Certificate

active

07047374

ABSTRACT:
Memory bandwidth may be enhanced by reordering read and write requests to memory. A read queue can hold multiple read requests and a write queue can hold multiple write requests. By examining the contents of the queues, the order in which the read and write requests are presented to memory may be changed to avoid or minimize page replace conflicts, DIMM turn around conflicts, and other types of conflicts that could otherwise impair the efficiency of memory operations.

REFERENCES:
patent: 6564304 (2003-05-01), Van Hook et al.
patent: 6571332 (2003-05-01), Miranda et al.
patent: 6629220 (2003-09-01), Dyer
patent: 6654860 (2003-11-01), Strongin et al.
patent: 6715046 (2004-03-01), Shoham et al.
patent: 6801976 (2004-10-01), Creta et al.

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