Memory protection system for a multi-tasking system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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711201, 711163, G06F 1214

Patent

active

059957506

ABSTRACT:
A memory protection system in a multi-tasking system for preventing a currently running application from writing data to a memory segment storing data for a second application. The memory protection system transmits m upper address defining a memory segment of the currently running application to the memory from a memory register. The memory protection system detects when a currently running application generates an invalid address and disables the data operation to prevent the corruption of data in a memory segment storing data for the currently running application. The system verifies that the m upper address bits in the memory register after the application is completed are equal to m upper address bits of the memory segment of the completed application.

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patent: 5590351 (1996-12-01), Sowadsky
patent: 5680568 (1997-10-01), Sakamura
patent: 5787492 (1998-07-01), Shuma et al.

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