Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-12-27
2002-07-23
Peikari, B. James (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S153000, C711S156000, C711S152000
Reexamination Certificate
active
06425048
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory pool control circuit and a memory pool control method, and more particularly to a memory pool control circuit and a memory pool control method for managing a shared memory.
2. Description of the Related Art
Various systems in which a plurality of processors or tasks (processes) use one shared memory are commonly known. In such a system, it is required to appropriately manage the shared memory.
According to the prior art, in managing a shared memory, memory areas are locked according to the requests of tasks, and it is so arranged that any memory area that is vacated be unlocked.
In order to effectively utilize memory areas, there is used a configuration in which a plurality of fixed length fields are put together into a unit (block), and each block is locked as a memory area. In this case, each field in a block may be occupied or unoccupied. Moreover, it is difficult to determine whether a given field in a block is occupied or unoccupied. As a result, even if all the fields in a block become unoccupied, it is difficult to unlock an intended block. Thus, it is difficult to judge whether or not a secured memory area can be appropriately unlocked, resulting in a problem that, once a memory area is locked, the memory area cannot be unlocked.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a memory pool control circuit and a memory pool control method which readily allows to confirm whether or not a given memory area can be appropriately unlocked even where a plurality of fixed length fields put together into a unit (block) and each block is locked as a memory area.
A memory pool control circuit according to the invention, intended for managing a shared memory divided into memory spaces each having a predetermined plurality of fields, is provided with a content addressable memory for storing pointers for managing free areas in a shared memory and storing flags for indicating, for each field, whether or not the field is being used; an area securing circuit for locking a memory space as a locked memory space in compliance with an access to the shared memory and updating the pointers in the content addressable memory; a local access circuit for erecting flags in the content addressable memory according to the state of use of fields in the locked memory space; and an area releasing circuit for searching the content addressable memory and unlocking the locked memory space if all the fields therein are found free.
A memory pool control method according to the invention, intended for managing a shared memory divided into memory spaces each having a predetermined plurality of fields, comprises an associative storage step to store pointers for managing free areas in a shared memory and flags for indicating, for each field, whether or not the field is being used; an area securing step to lock a memory space as a locked memory space in compliance with an access to the shared memory and to update the aforementioned pointers; a local accessing step to update the flags in the content addressable memory according to the state of use of fields in the locked memory space; and an area releasing step to search the flags and to unlock the locked memory space if all the fields therein are found free.
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Peikari B. James
Young & Thompson
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