Memory paging scheme for 8051 class microcontrollers

Details Memory paging scheme for 8051 class microcontrollers Memory paging scheme for 8051 class microcontrollers

1997-11-14

2000-09-05

Palys, Joseph E.

Electrical computers and digital processing systems: support

Digital data processing system initialization or configuration

Loading initialization program

710130, 710261, 710262, G06F 1314

Patent

active

061158143

ABSTRACT:
A field-reprogammable storage control device has a microcontroller, a write-protected memory which contains a boot code for the storage control device, a rewriteable memory for application code executable by the microcontroller, and a jump function located in both the write-protected memory and the rewriteable memory for movement between the write-protected memory and the rewriteable memory for recover after a processing interruption. The storage control device remains operational using the write-protected memory and the boot code while receiving a new application code from a remote site.

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patent: 5890003 (1999-03-01), Cutts, Jr. et al.
patent: 5914543 (1999-06-01), Scherpenberg et al.

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