Memory of and circuit for rearranging the order of data in a...

Details Memory of and circuit for rearranging the order of data in a... Memory of and circuit for rearranging the order of data in a...

2005-04-21

2008-10-07

Peikari, B. James (Department: 2189)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S066000, C365S189020

Reexamination Certificate

active

07433980

ABSTRACT:
Circuits and methods of rearranging the order of data in a memory having asymmetric input and output ports are disclosed. According to one embodiment, a method comprises steps of providing an input port of a memory having an input width and output port having an output width which is different than the input width. A plurality of data words are received at the input of the memory, wherein each data word has a width corresponding to the input width. The order of the plurality of input data words is rearranged; and an output word based upon the rearranged data words and having a width corresponding to the output width is generated. Various circuits and algorithms for implementing the methods are also disclosed.

REFERENCES:
patent: 5446438 (1995-08-01), Eichfeld
patent: 5521625 (1996-05-01), Morrison
patent: 6061449 (2000-05-01), Candelore et al.
patent: 7149901 (2006-12-01), Herbert et al.
patent: 2003/0037190 (2003-02-01), Alexander et al.
patent: 2004/0233733 (2004-11-01), Peel et al.

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