Excavating
Patent
1993-02-17
1995-08-22
Beausoliel, Jr., Robert W.
Excavating
371 62, 364270, 364DIG1, 395405, 395495, 395299, H04Q 1104
Patent
active
054447224
ABSTRACT:
A memory module is used in multiples on a bus in a data processing system. Each memory module comprises a plurality of storage cells, an input circuit for receiving a read command and a read address from the bus, and a compare circuit which generates a match signal when the read address is within a selectable address range for the storage cells. Also, the module further includes: a control circuit, coupled to the compare circuit, which responds to the match signal by almost always executing the read command in a small time interval on the bus and occasionally executing the read command in a long time interval. Further, the module includes a bus transmit circuit, coupled to the control circuit, for sending a control signal on the bus if the control circuit selects the long time interval. Also, the module includes an error circuit, coupled to the control circuit and the bus, for setting an error flag if the control circuit selects the short time interval and, during that short time interval, the control signal is detected on the bus from another module in the memory system.
REFERENCES:
patent: 3982111 (1976-09-01), Lerner et al.
patent: 4130240 (1978-12-01), Millham et al.
patent: 4359771 (1982-11-01), Johnson et al.
patent: 4672609 (1987-06-01), Humphrey et al.
patent: 4688222 (1987-08-01), Blum
Axenfeld Robert R.
Beausoliel, Jr. Robert W.
Fassbender Charles J.
Le Dieu-Minh
Starr Mark T.
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