Memory module utilizing partially defective memory chips

Details Memory module utilizing partially defective memory chips Memory module utilizing partially defective memory chips

1989-12-28

1991-02-12

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Bad bit

36523003, 36523006, G11C 700

Patent

active

049929844

ABSTRACT:
A memory device which includes several partially defective memory chips and a control circuit for receiving an address signal corresponding to a storage cell address of each of the partially defective memory chips, and for controlling, in response to the address signal, the partially defective memory chips such that only one thereof is enabled.

REFERENCES:
patent: 3714637 (1973-01-01), Beausoleil
patent: 3735368 (1973-05-01), Beausoleil
patent: 3781826 (1973-12-01), Beausoleil
patent: 4837747 (1989-06-01), Dosaka et al.

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