Memory module for improving signal integrity and computer...

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S051000, C365S230030, C365S198000

Reexamination Certificate

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08036011

ABSTRACT:
A memory module includes a plurality of buses and a plurality of memory chips arranged close to each other along each of the plurality of buses. An N-th memory chip, where N is an integer, of the plurality of memory chips is connected to any one of the plurality of buses, and each of the other memory chips of the plurality of memory chips, except for the N-th memory chip, is connected to the other one of the plurality of buses.

REFERENCES:
patent: 6519173 (2003-02-01), Funaba et al.
patent: 7339840 (2008-03-01), Wallner et al.
patent: 2006/0184756 (2006-08-01), Djordjevic et al.
patent: 2007/0019494 (2007-01-01), Moosrainer et al.
patent: 2007/0061614 (2007-03-01), Choi
patent: 2007/0189049 (2007-08-01), Djordjevic et al.
patent: 2007-80258 (2007-03-01), None

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