Electrical computers and digital processing systems: memory – Address formation
Reexamination Certificate
2007-01-23
2007-01-23
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
C711S005000, C711S100000, C711S212000, C365S052000, C365S063000, C365S191000
Reexamination Certificate
active
10719316
ABSTRACT:
A computer body outputting a predetermined number of address signals A0to A11and a plurality of select signals CSO and CSI, generates a memory select signal CS and an additional address signal A12added to the signals A0to A11according to the inputted signals CSO and CSI, and provides the signal CS, signal A12, and signals A0to AI1to a 256-megabit SDRAM (memory), so that the computer body can access the corresponding data. The computer body can access the data corresponding to the generated additional address signal A12and predetermined number of the address signals A0to A11.
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Bungo Motohiko
Yuasa Kaoru
Bragdon Reginald
Buffalo Inc.
Ganjian Peter
Namazi Mehdi
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