Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-08-01
2006-08-01
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S136000
Reexamination Certificate
active
07085890
ABSTRACT:
Methods, systems, and computer program products are disclosed for mapping a virtual memory page to a real memory page frame in a multiprocessing environment that supports a multiplicity of operating system images. Typical embodiments include retrieving into an operating system image, from memory accessible to a multiplicity of operating system images, a most recently used cache color for a cache, where the cache is shared by the operating system image with at least one other operating system image; selecting a new cache color in dependence upon the most recently used cache color; selecting in the operating system image a page frame in dependence upon the new cache color; and storing in the memory the new cache color as the most recently used cache color for the cache.
REFERENCES:
patent: 5630097 (1997-05-01), Orbits et al.
patent: 5860095 (1999-01-01), Iacobovici et al.
patent: 2001216140 (2001-08-01), None
patent: 2001282547 (2001-10-01), None
patent: 2002342163 (2002-11-01), None
Jian Huang, et al.; Page-Mapping Techniques for CC-NUMA Multiprocessors; 1997; pp. 91-104; (0-7803-4229-1/97 1997 IEEE); US.
Rui Min, et al., Improving Performance of Large Physically Indexed Caches by Decoupling Memory Addresses from Cache Addresses, Nov. 2001, vol. 50, No. 11; IEEE Transactions; US.
Jack L. Lo, et al.; An Analysis of Database Workload Performance on Simultaneous Multithreaded Processors; US.
R. E. Kessler et al.; Page Placement Algorithms for Large Real-Indexed Caches; Nov. 1992; pp. 338-359; vol. 10, No. 4; ACM Transactions on Computer Systems; US.
Jochen Liedtke; Colorable Memory; Nov. 10, 1996; pp. 1-4; IBM; US.
Biggers & Ohanian LLP
Dawkins Marilyn S.
International Business Machines - Corporation
Nguyen Hiep T.
Ohanian H. Artoush
LandOfFree
Memory mapping to reduce cache conflicts in multiprocessor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory mapping to reduce cache conflicts in multiprocessor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory mapping to reduce cache conflicts in multiprocessor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3657954