Memory management unit for field programmable gate array boards

Details Memory management unit for field programmable gate array boards Memory management unit for field programmable gate array boards

2011-03-08

2011-03-08

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

C711S154000, C711SE12006, C711SE12007, C716S030000

Reexamination Certificate

active

07904688

ABSTRACT:
The invention relates to methods and apparatus for offloading the workload from a computer system's CPU, memory and/or memory controller. Methods and apparatus for managing board memory on a FPGA board on behalf of applications executing in one or more FPGAs are disclosed.

REFERENCES:
patent: 5692147 (1997-11-01), Larsen et al.
patent: 6078736 (2000-06-01), Guccione
patent: 6938177 (2005-08-01), Blemel
patent: 7454550 (2008-11-01), Benbow et al.
patent: 2003/0086300 (2003-05-01), Noyes et al.
patent: 2004/0093537 (2004-05-01), Thompson et al.
“Developing and Integrating FPGA Coprocessors”, Paul Ekas and Brian Jentz, Fall 2003, Altera Corporation, p. 1-6.
“FPGA Peripheral Expansion & FPGA Co-Processing”, Altera Corporation, Jul. 2004, p. 1-26.
“The Authoritative Dictionary of IEEE Standards Terms”, seventh edition, Dec. 2000, copyright by the IEEE p. 626.

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