Memory management method and system thereof

Details Memory management method and system thereof Memory management method and system thereof

2005-04-12

2005-04-12

Moazzami, Nasser (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Combining two or more values to create address

C711S002000, C711S212000

Reexamination Certificate

active

06880065

ABSTRACT:
A method and system thereof for managing a computer system memory, where the memory is structured as contiguous memory chunks, each chunk having a header. A chunk header includes a first offset value, a sign bit associated with the first offset value, and a number of bits having values that are added to a second offset value that is determined from the first offset value. The second offset value is then used for determining an actual offset value that is applied to a base address to provide a memory location of the memory chunk. In one such embodiment, the first offset value includes 23 bits (plus the sign bit), the number of bits added to the second offset value is two, and the actual offset value includes 27 bits (plus the sign bit). As such, up to 128 MB of memory can be addressed.

REFERENCES:
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patent: 5249280 (1993-09-01), Nash et al.
patent: 5357620 (1994-10-01), Suzuki
patent: 5420992 (1995-05-01), Killian et al.
patent: 5680568 (1997-10-01), Sakamura
patent: 5732404 (1998-03-01), Johnson et al.

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