Memory management device and memory device

Static information storage and retrieval – Read/write circuit

Reexamination Certificate

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C365S185030, C365S230030

Reexamination Certificate

active

11408021

ABSTRACT:
A memory management device for managing a nonvolatile semiconductor memory which comprises a plurality of blocks, and permits data to be erased in units of one block, the memory management device comprises a setting unit configured to set an address range of data to be erased in response to an erase command in a block in which the data to be erased is written, when the erase command is issued with respect to the nonvolatile semiconductor memory and a controlling unit configured to output initial-value data as data to be read in response to a data read command, when the data read command is issued with respect to the nonvolatile semiconductor memory, and then when an address range of the data to be read in response to the data read command is included in the address range set by the setting unit.

REFERENCES:
patent: 6859856 (2005-02-01), Piau et al.
patent: 7057942 (2006-06-01), Suda et al.
patent: 2003/0156473 (2003-08-01), Sinclair et al.
patent: 2004/0080998 (2004-04-01), Chang et al.
patent: 2004/0202024 (2004-10-01), Shinagawa et al.
patent: 2004/0233707 (2004-11-01), Bell et al.
patent: 2006/0004969 (2006-01-01), Suda
patent: 2003-280822 (2003-10-01), None
U.S. Appl. No. 10/941,820, filed Sep. 16, 2004, Suda.

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