Memory management apparatus and method

Details Memory management apparatus and method Memory management apparatus and method

2005-05-03

2005-05-03

Portka, Gary (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S104000, C711S105000, C711S106000

Reexamination Certificate

active

06889290

ABSTRACT:
Cache memory systems, microprocessors, and computer systems, as well as methods of operating a cache memory system are described. The cache memory system includes a cache memory controller coupled to a dynamic cache memory and a static cache memory. The cache memory system provides the advantages of using dynamic memory (having a small circuit real estate requirement) for cache read operations, and static memory for cache write operations. Using the static memory for cache write operations allows the cache memory system to function as a write-back cache, instead of an instruction-only, or write-through cache.

REFERENCES:
patent: 4608666 (1986-08-01), Uchida
patent: 5680570 (1997-10-01), Rantala et al.
patent: 6134634 (2000-10-01), Marshall, Jr. et al.
patent: 6282617 (2001-08-01), Tirumala et al.
patent: 6515759 (2003-02-01), Smith
Lee et al., “Non-refreshing Dynamic RAM for On-chip Cache Memories”, 1990 IEEE Symposium on VLSI Circuits, p. 111-112.

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