Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-08-22
2006-08-22
Vital, Pierre M. (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S206000, C711S208000
Reexamination Certificate
active
07096340
ABSTRACT:
One embodiment of the present invention provides a method of memory management. Within the present embodiment, a page register along with supporting logic allows a mode to be selected by a processor at the same time it specifies a particular memory page. The selected mode defines what the subsequent use of the specified memory page will be. For example, this method may decrease overhead when moving between different memory pages by providing a mode that automatically returns to a previous page after a specified page has been accessed.
REFERENCES:
patent: 4685125 (1987-08-01), Zave
patent: 6023750 (2000-02-01), Hansen et al.
patent: 6504785 (2003-01-01), Rao
patent: 6745307 (2004-06-01), McKee
Blom Eric D.
Snyder Warren S.
Cypress Semiconductor Corporation
Padmanabhan Mano
Vital Pierre M.
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