Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate
2007-07-10
2007-07-10
Yoha, Connie C. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
C365S226000, C365S189090
Reexamination Certificate
active
11094236
ABSTRACT:
A memory macro includes a variable number of memory cell arrays and associated circuits, and peripheral circuit elements such as line drivers, power-source transistors, and power-source capacitors coupled to the associated circuits. Multiple peripheral circuit elements of one type are placed side by side in a certain direction, aligned in that direction with one or more memory cell arrays, and are coupled in parallel to the associated circuits of those memory cell arrays. The number of these peripheral circuit elements is selected according to the number of memory cell arrays aligned with them, so that electrical requirements can be met without unnecessary consumption of space or current.
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Oki Electric Industry Co. Ltd.
Volentine & Whitt P.L.L.C.
Yoha Connie C.
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