Memory interface supporting multi-stream operation

Details Memory interface supporting multi-stream operation Memory interface supporting multi-stream operation

2007-11-13

2007-11-13

Bragdon, Reginald (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S219000

Reexamination Certificate

active

10933698

ABSTRACT:
A memory device includes one or more memory arrays and an interface controller for exchanging memory contents data with a semiconductor device over a communication link. The exchanging of data occurs within sequential transactions. Each transaction is associated with a block of consecutive memory locations and with a starting address. The interface controller includes at least two address buffers, each for storing any of the starting addresses and any address obtained by incrementation thereof.

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patent: 2002/0018394 (2002-02-01), Takahashi
patent: 2003/0187909 (2003-10-01), Le et al.
patent: 2005/0071570 (2005-03-01), Takasugl et al.

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