Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2011-02-15
2011-02-15
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S154000, C711SE12078
Reexamination Certificate
active
07890728
ABSTRACT:
A memory interface device has a write detection section that detects the write of a predetermined unit amount of data by a memory write unit into a memory. A signal generation section generates a signal to notify the memory write unit that readout of data from the memory by a memory readout unit has been completed. A data storage amount measurement device measures an amount of data stored in the memory during the memory write procedures. A memory readout control section generates an interrupt signal with respect to the memory readout unit when the stored data amount in the memory reaches a predetermined readout start storage amount. A timer counts a period in which writing of the predetermined unit amount of the data into the memory by the memory write unit is discontinued and outputs a timeout signal to the memory readout control section when a value of the period count reaches a predetermined timer period. The memory readout control section generates the interrupt signal with respect to the memory readout unit even when the memory readout control section receives the timeout signal output from the timer.
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Ike Toshimasa
Matsui Takayuki
Noguchi Masahiro
Watanabe Fukuzo
Adams & Wilks
Dare Ryan
Kim Matt
Seiko Instruments Inc.
Vodafone K.K.
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