Memory interface circuit including bypass data forwarding with e

Details Memory interface circuit including bypass data forwarding with e Memory interface circuit including bypass data forwarding with e

1999-06-28

2000-08-29

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

For complementary information

36518903, 365196, 365149, 365205, G11C 706

Patent

active

061117943

ABSTRACT:
A circuit and operating technique acquires input write data available at the beginning of the first half cycle and passes the write data to read terminals, bypassing read data from a memory cell that is read during the first half cycle, while incurring no read access penalty. The circuit and operating technique bypass the input write data to the read terminal in place of data transferred from the memory cells. The data is forwarded to an node having a relatively large capacitance by connecting to the node very small devices with a small capacitance and with the small devices operating in saturation. The relatively large capacitance of the node is exploited to achieve a multiplexing functionality with effectively no delay.

REFERENCES:
patent: 5940334 (1999-08-01), Holst
patent: 5964884 (1999-10-01), Partovi et al.

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