Static information storage and retrieval – Read/write circuit – Testing
Patent
1990-10-16
1992-10-13
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Testing
36518907, G11C 2900
Patent
active
051557045
ABSTRACT:
An external test mode enable signal (xTE) applied to a memory IC is filtered on board the memory IC to prevent inadvertent switching into test mode due to noise. In one approach, the test mode enable signal passes through an internal RC low-pass filter (18,20) to reject high frequency signals. Another approach is filtering the enable signal digitally using an xRAS* signal as a filter signal. Logic (FIG. 2) is provided to assert test mode (node C) only when the external enable signal has been asserted for at least a minimum time determined by the filter signal, again to avoid false switching. Either approach allows lowering test mode enable signal voltages below those used presently. The invention, therefore, can be used with particular advantage to maintain test mode enable noise margin in small geometry circuits which cannot withstand supervoltages.
REFERENCES:
patent: 4965768 (1990-10-01), Takeuchi
Toshiba Data Book, 1989, pp. A-194 through A-196.
Casper Stephen L.
Walther Terry R.
Micro)n Technology, Inc.
Popek Joseph A.
LandOfFree
Memory integrated circuit test mode switching does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory integrated circuit test mode switching, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory integrated circuit test mode switching will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1306335