Memory integrated circuit and methods for manufacturing the same

Static information storage and retrieval – Systems using particular element – Capacitors

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257296, G11C 1124

Patent

active

058124438

ABSTRACT:
A memory integrated circuit which is driven with a low power and reduced cell area and a method for manufacturing the same. A plurality of active regions having an H-shape with four source regions and a common drain region are formed on a semiconductor substrate. Four word lines, each having a different source correspondingly pass through each of the four source regions of an active region, thereby forming four transistors driven, independently. These four transistors are designed so as to share one bit line thereby reducing the driving voltage of the transistor to 1/4 Vcc. With a low power driving source, four transistors and a capacitor are formed on a small area to thereby reduce the cell size to 33% and even more.

REFERENCES:
patent: 5635742 (1997-06-01), Hoshi
patent: 5703390 (1997-12-01), Itoh
S. Wolf, "Silicon Processing for the VLSI Era,vol. 2, Process Integration", Lattice Press, Sunset Beach, Calif. 1990, pp. 201-203; 368-370.

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