Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2006-10-03
2008-05-27
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
C365S194000, C365S195000, C365S207000
Reexamination Certificate
active
07379356
ABSTRACT:
A memory includes at least one memory segment that includes an array of memory cells arranged in a plurality of columns, each of the plurality of columns having a corresponding bitline pair. An address decoder includes a row decoder and a column decoder that addresses a selected one of the array of memory cells in a selected one of the plurality of columns in response to a memory address. A sense amplifier generates a data output by sensing a differential voltage from the corresponding bitline pair of the selected one of the plurality of columns in response to a sense amp enable signal. A sense amp enable signal generator generates the sense amp enable signal with adjustable timing, based on sense amp feedback signals.
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Garlick & Harrison & Markison
Pham Ly D
Sigmatel, Inc.
Stuckman Bruce E.
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