Memory incorporating logic LSI and method for testing the same L

Details Memory incorporating logic LSI and method for testing the same L Memory incorporating logic LSI and method for testing the same L

1988-09-30

1990-09-11

Gossage, Glenn

Static information storage and retrieval

Read/write circuit

Including specified plural element logic arrangement

365201, 371 211, 371 226, G11C 700

Patent

active

049568183

ABSTRACT:
A memory incorporating logic Large Scale Integration (LSI) and a method for testing the same LSI includes signal path switching circuit portions which are disposed in the paths of a memory portion and a logic circuit portion. A test signal input and an output signal can be observed at an input and output terminal portion so as to be able to effect a dynamic function test of the memory portion. Further there is disposed a logic circuit test signal memory circuit portion, which switches over the signal path switching circuit portions to the logic circuit portion so as to be able to effect a test of the logic circuit portion, independently of the state of the memory portion.

REFERENCES:
patent: 3961254 (1976-06-01), Cavaliere et al.
patent: 4074851 (1978-02-01), Eichelberger et al.
patent: 4481627 (1984-11-01), Beauchesne et al.
patent: 4710930 (1987-12-01), Hatayama et al.
patent: 4825414 (1989-04-01), Kawata

Affiliated with

Also associated with

Rating

Memory incorporating logic LSI and method for testing the same L does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory incorporating logic LSI and method for testing the same L, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory incorporating logic LSI and method for testing the same L will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1189401