Memory including write circuit for providing multiple reset...

Static information storage and retrieval – Systems using particular element – Amorphous

Reexamination Certificate

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C365S148000

Reexamination Certificate

active

07577023

ABSTRACT:
An integrated circuit includes an array of resistive memory cells having varying critical dimensions and a write circuit. The write circuit is configured to reset a selected memory cell by applying a first pulse having a first amplitude and a second pulse having a second amplitude less than the first amplitude to the selected memory cell.

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