Static information storage and retrieval – Systems using particular element – Amorphous
Reexamination Certificate
2011-03-01
2011-03-01
Dinh, Son (Department: 2824)
Static information storage and retrieval
Systems using particular element
Amorphous
C365S155000, C365S174000
Reexamination Certificate
active
07898848
ABSTRACT:
An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions overlying the common region. Each shared control region forms the control regions of a plurality of adjacent selection transistors and accommodates the first regions of the plurality of adjacent selection transistors as well as contact portions of the shared control region. Blocks of adjacent selection transistors of the plurality of selection transistors share a contact portion and the first regions of a block of adjacent selection transistors are arranged along the shared control region between two contact portions. A plurality of biasing structures are formed between pairs of first regions of adjacent selection transistors, for modifying a charge distribution in the shared control region below the biasing structures.
REFERENCES:
patent: 5432736 (1995-07-01), Wong et al.
patent: 5912842 (1999-06-01), Chang et al.
patent: 5991199 (1999-11-01), Brigati et al.
patent: 6044013 (2000-03-01), Tanaka et al.
patent: 7075146 (2006-07-01), Forbes
patent: 2004/0051094 (2004-03-01), Ooishi
Roberto Benz, “Innovative Technologies For High Density Non-Volatile Semiconductor Memories,” the Journal of Elsevier, Microelectronic Engineering, vol. 80, Jun. 17, 2005, pp. 249-255.
Al Fazio et al., Intel Strataflash Memory Technology Development and Implementation, 1997 Intel Technology Journal, 13 pgs., 1997.
Korean Intellectual Property Office, International Search Report and Written Opinion for International Application No. PCT/US2008/059380, 10 pgs., Sep. 30, 2008.
Pellizzer Fabio
Pirovano Agostino
Dinh Son
Intel Corporation
Trop, Prunner & Hu, P.C.
LandOfFree
Memory including bipolar junction transistor select devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory including bipolar junction transistor select devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory including bipolar junction transistor select devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2687406