Memory hub bypass circuit and method

Details Memory hub bypass circuit and method Memory hub bypass circuit and method

2006-04-04

2008-08-19

Peugh, Brian R. (Department: 2187)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S154000

Reexamination Certificate

active

07415567

ABSTRACT:
A computer system and a method used to access data from a plurality of memory devices with a memory hub. The computer system includes a plurality of memory modules coupled to a memory hub controller. Each of the memory modules includes the memory hub and the plurality of memory devices. The memory hub includes a sequencer and a bypass circuit. When the memory hub is busy servicing one or more memory requests, the sequencer generates and couples the memory requests to the memory devices. When the memory hub is not busy servicing multiple memory requests, the bypass circuit generates and couples a portion of each the memory requests to the memory devices and the sequencer generates and couples the remaining portion of each of the memory requests to the memory devices.

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