Memory having parity generation circuit

Details Memory having parity generation circuit Memory having parity generation circuit

2008-06-03

2008-06-03

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S189040, C365S189070

Reexamination Certificate

active

07382673

ABSTRACT:
A memory includes a column segment including memory cells along word lines, and a parity generation circuit configured to receive a first serial data stream of data bit values stored in memory cells along a word line and determine a first parity value of the first serial data stream upon entry of self refresh.

REFERENCES:
patent: 6535452 (2003-03-01), Okuda et al.
patent: 6697992 (2004-02-01), Ito et al.
patent: 6838331 (2005-01-01), Klein
patent: 7032142 (2006-04-01), Fujioka et al.
patent: 7167403 (2007-01-01), Riho et al.
patent: 2003/0149929 (2003-08-01), White
patent: 2004/0117723 (2004-06-01), Foss
patent: 2004/0221098 (2004-11-01), Ito et al.

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