Memory having count detection circuitry for detecting access...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S236000, C365S241000

Reexamination Certificate

active

07460425

ABSTRACT:
A memory capable of suppressing increase in circuit size, reduction in a period for an original access and increase in power consumption while suppressing an imprint can be obtained. The memory includes a first count detection circuit for detecting an access frequency with respect to memory cells, a second count detection circuit for detecting an access frequency of each of memory cell blocks and a third count detection circuit detecting a no-access frequency resulting in an imprint.

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H. Hada. “Process for ferroelectric random access memory (FeRAM)”, FED Review, Mar. 14, 2002, p. 1-7, vol. 1. No. 22.

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