Memory for operating synchronously with clock signals generated

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

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Details

713400, 713500, 713600, 365233, G06F 100, G06F 1200

Patent

active

059788917

ABSTRACT:
A memory 1 performs its internal operation in response to access requests (200, 201 and 202) of a CPU 2 in synchronism with the oscillated output of a self-excited oscillator 102 incorporated therein and according to said access requests, and outputs a response request 103 for said access requests to said CPU in synchronism with its internal operation. The CPU performs the access requests for the memory, and fetches data from the outside or outputs the data to the outside in response to and in synchronism with the response request 103 from the accessed memory and according to the kinds of said access requests.

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