Memory fence with background lock release

Details Memory fence with background lock release Memory fence with background lock release

2006-11-17

2008-10-07

Peugh, Brian R (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S151000, C711S152000

Reexamination Certificate

active

07434016

ABSTRACT:
In one embodiment, a processor is operable to issue a first memory request to access a particular memory location, and, prior to completion of the first memory request, to issue a command to release a memory lock on the particular memory location when access to the particular memory location is complete. The processor is further operable to, prior to release of the memory lock, issue a second memory request to access a different memory location. Also a memory management unit is operable to receive the command to release the memory lock and to monitor for when access to the particular memory location is complete. The memory management unit releases the memory lock in response to completion.

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